If ID bit can be toggled, the CPU support cpuid instruction. With GCC’s Inline Assembly the same code can be written more concise, as we need not manually copy the values into and out of the registers, but rather can handle this by defining our arguments more precisely (see line 3). Once 486 or higher CPU is detected, we check ID bit of EFLAGS. This is a bit unintuitive, since the the input variables are specified after the output variables, but that’s exactly the way it is.

The argument list after first colon (line 10) tells GCC’s Inline Assembly what the output variables are (our local variables) and from where they should be read (in this case registers, hence the =r).Īfter the second colon follows the list of input variables. Then, we can retrieve the values from the registers (line 6-9) and write them to our local variables. Now the CPU itself reads the values from these registers and sets the appropriate bits in the very same registers. The variables a, b, c and d are used to store the contents of the registers EAX, EBX, ECX and EDX in our program.Īfter setting the value of a to 1 (line 2) and moving the value into the register EAX (line 4), we issue the cpuid instruction (line 5). The code above demonstrates a call of CPUID querying general processor information (such as model, family, bus frequency, etc.). cache size : 1024 KB physical id : 0 siblings : 2 core id : 0 cpu cores : 1.

Intel cpu id